Explore our pre-assembled, factory acceptance-tested (FAT) membrane separation, desalination, and high-salinity zero liquid discharge assemblies built for mission-critical installations worldwide.
In modern microelectronics, water is not merely a utility—it is the highest-volume chemical reagent in direct contact with critical wafer surfaces.
Within sub-10nm and advanced packaging semiconductor foundries, wafer fabrication demands absolute chemical cleanliness. A standard 300mm wafer fabrication plant (fab) processing 40,000 wafer starts per month consumes between 2 to 4 million gallons of Ultrapure Water (UPW) each day. At these physical dimensions, even individual dissolved ions, trace boron, silicates, bacteria, or dissolved gases become fatal yield-killers, causing bridge defects, dielectric breakdown, or lattice contamination.
Ultrapure water reaches the theoretical physical limit of pure H₂O, exhibiting an electrical resistivity of 18.2 MΩ·cm at 25°C. However, resistivity alone no longer guarantees product safety in sub-3nm nodes. Modern procurement specifications dictate stringent microcontaminant thresholds: Total Organic Carbon (TOC) < 0.5 parts per billion (ppb), dissolved oxygen (DO) < 1 ppb, dissolved silica < 0.2 ppb, critical trace metals (such as sodium, iron, and copper) < 0.1 parts per trillion (ppt), and zero bacterial counts per 100 liters.
E-E-A-T Manufacturing Note: Shanghai Tongjie Environmental Protection Technology Co., Ltd. builds membrane separation systems backed by 38+ utility and invention patents. Our modular UPW trains integrate high-flux double-pass RO, vacuum degasification (Liqui-Cel), continuous electrodeionization (CEDI), catalytic 185nm TOC-destruction UV reactors, and PVDF-HP polished piping networks designed specifically for semiconductor cleanrooms.
| Water Quality Parameter | Feed Water Baseline | Standard Industrial Pure Water | ASTM D5127 Type E-1 (Semiconductor) | Tongjie Sub-ppb UPW Spec |
|---|---|---|---|---|
| Resistivity (25°C) | 0.002 - 0.05 MΩ·cm | > 1.0 MΩ·cm | > 18.2 MΩ·cm | 18.24 MΩ·cm (Theoretical Limit) |
| Total Organic Carbon (TOC) | 1,000 - 5,000 ppb | < 200 ppb | < 1.0 - 2.0 ppb | < 0.5 ppb (Dual 185nm VUV) |
| Dissolved Silica (Reactive) | 5,000 - 20,000 ppb | < 50 ppb | < 0.5 ppb | < 0.1 ppb |
| Dissolved Oxygen (DO) | 8,000 - 10,000 ppb | Unregulated | < 1.0 - 3.0 ppb | < 0.8 ppb |
| Particles (> 20 nm) | Millions / mL | < 500 / mL | < 10 / mL | < 1 / mL (UF Polished) |
| Trace Boron | 50 - 500 ppb | < 10 ppb | < 0.05 ppb | < 0.01 ppb (Selective Polishing) |
From wet chemical benches to extreme ultraviolet (EUV) photolithography scanners, UPW interacts with silicon at every step of processing.
Wafer surfaces undergo multiple standard cleans (SC-1 and SC-2) to remove organic residues and metallic particles. UPW is applied as the universal rinsing solvent between aggressive oxidizing and acid etching stages. Any dissolved oxygen in the rinse water can trigger uncontrolled native oxide growth on exposed silicon lattices, compromising sub-gate dielectric thickness.
CMP planarizes wafer topography via abrasive chemical slurries. Post-CMP scrubbing requires massive volumes of high-velocity UPW to strip silica and ceria slurry particles from microscopic interconnect trenches. Trace ionic contaminants remaining on the polished wafer can generate parasitic capacitance and inter-metal shorts.
In 193nm immersion (ArFi) lithography, high-purity water acts as the refractive optical liquid layer between the final lens element and the wafer. The UPW refractive index must remain stable to 10⁻⁶ units. Any micro-bubbles, dissolved air, or organic hydrocarbons cause light scattering, pattern distortion, and critical dimension (CD) variations.
Following high-aspect-ratio reactive ion etching, harsh stripper chemicals (such as SPM or piranha mixtures) are rinsed with hot ultrapure water. Rinsing 3D NAND deep trench architectures requires surfactant-free water with exceptionally low surface tension to penetrate and flush 100:1 aspect ratios without structural collapse.
CoWoS (Chip-on-Wafer-on-Substrate) and 3D stacking require micro-bump solder cleaning and flux removal. Water purity in packaging facilities must now match cleanroom standards to prevent corrosion of micro-bumps spaced below 25-micron pitches.
Due to severe municipal discharge constraints and ESG reporting rules, contemporary semiconductor plants reclaim up to 85% of spent rinse water. Tongjie's selective membrane trains treat hydrofluoric (HF), copper-laden, and CMP wastewater streams separately for closed-loop return to the UPW makeup loop.
Eliminating contaminants to the parts-per-trillion scale requires an orchestrated progression of physical separation, chemical oxidation, and ionic exchange technologies.
Coagulation, multi-media sand/anthracite beds, activated carbon filters, and ultrafiltration (UF) modules lower turbidity, eliminate suspended colloidal matter, and keep the Silt Density Index (SDI₁₅) < 2.5.
Two-pass Reverse Osmosis (RO) with energy recovery devices strips > 99.2% of total dissolved solids. High-recovery brackish water membranes reject silica, heavy ions, and raw organics.
Continuous Electrodeionization (CEDI) removes trace ionic species without hazardous acid/caustic regeneration, followed by vacuum contactor membranes (Liqui-Cel) to strip DO down to < 5 ppb.
Dual-wavelength (185nm / 254nm) photochemical reactors generate hydroxyl radicals (•OH) that break carbon chains down to CO₂, which is removed via downstream mixed-bed ion exchangers.
Non-regenerable nuclear-grade ion-exchange resin combined with 6,000 Dalton hollow-fiber ultrafilters eliminates any micro-particles (> 20nm) before pure water enters fab cleanroom loops.
Constructing a semiconductor UPW delivery network requires strict control of materials in contact with the fluid. Conventional stainless steels leach nickel, chromium, and iron ions when exposed to 18.2 MΩ·cm water, which is chemically aggressive due to its complete ion depletion. Tongjie engineers systems with high-purity Polyvinylidene Fluoride (PVDF-HP) or Perfluoroalkoxy (PFA) for point-of-use cleanroom distribution. Where metallic components are required, we utilize 316L stainless steel with electro-polished inner surfaces (Ra < 0.25 µm), assembled through automated orbital tube welding under high-purity argon shielding.
Combining complete vertical integration, rapid modular prefabrication, and proven field engineering to eliminate project schedule overruns.
Historically, fab water infrastructure faced long lead times: European and American engineering houses relied on fragmented subcontractors, resulting in 14- to 20-month delivery schedules. Shanghai Tongjie consolidates mechanical design, pressure vessel fabrication, electrical PLC cabinet wiring, pipe pre-spooling, and clean testing under one ISO 9001/14001/45001-certified factory in Jiading District, Shanghai.
Equipment is built within precision structural steel skids or standard ISO shipping containers. Pre-wired, pre-piped, and factory-tested (FAT), reducing on-site construction schedules from months to weeks.
Direct partnerships with membrane suppliers (DuPont FilmTec, Toray, Hydranautics), Grundfos and Danfoss high-pressure pumps, and Siemens/Schneider automation ensure reliable supply chains.
Standardized engineering workflows and local component manufacturing deliver high-spec systems at a 30% to 45% CAPEX savings compared to Western integrators—without compromising component quality.
Navigating the intersection of the US CHIPS Act, European Chips Act, and East Asian mega-cluster builds under stringent environmental regulations.
The semiconductor landscape is experiencing unprecedented geographic redistribution. Billions in public and private capital are pouring into wafer fabs across Arizona, Texas, Dresden, Kumamoto, Singapore, and across China. However, a major bottleneck to fab operational readiness remains water infrastructure and watershed permitting.
A leading 3nm foundry in a water-stressed basin can consume municipal water equivalent to a city of 150,000 residents. During regional droughts, municipal authorities restrict intake quotas. Fab operators must turn to seawater desalination intake (for coastal facilities in Japan and Southeast Asia) or high-recovery Zero Liquid Discharge (ZLD) reclamation. Tongjie's containerized seawater RO systems and disc-tube RO (DTRO) assemblies allow fabs to secure private water supplies, insulate production from regional grid curtailments, and reclaim high-salinity wastewater streams for ongoing reuse.
Every UPW system shipped from Shanghai Tongjie meets international cleanroom safety and electrical conformity standards.
Engineered to SEMI F63-0213 (Guide for Ultrapure Water Used in Semiconductor Processing) and SEMI F75 (Guide for Quality Monitoring of Ultrapure Water Used in Semiconductor Manufacturing). All piping loops prevent dead legs (L/D < 3).
All pressure vessels are fabricated to ASME Section VIII / PED specs. Electrical cabinets are built to CE directives and NFPA 79 / UL 508A specifications with dual-safety circuit interlocks and multi-language HMI interfaces.
Integrated SCADA with IoT gateways provides real-time tracking of individual sensor nodes (resistivity, DO, TOC, pressure drops). Predictive alerts notify technicians of membrane scaling weeks before delta-P breaches occur.
Key technical and commercial queries from EPC contractors, facility directors, and procurement leaders.
Complete fluid handling lines: oilfield fracturing flowback treatment, high-pressure membrane concentration, and API pharmaceutical systems.
Submit your raw water chemistry analysis, flow volume requirements, and cleanroom target specifications. Our senior fluid engineers will prepare a complete mass-balance schematic, P&ID layout, and detailed equipment quote within 48 business hours.